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    • 专利摘要:
    The electroluminescent device 10 includes a porous silicon region 22 adjacent to the bulk silicon region 20 and has both a top electrical contact 24 of transparent indium tin oxide and a bottom electrical contact of aluminum. The device includes a large amount of doped region 28 to provide an ohmic contact. The porous silicon region 22 is produced by anodizing through the ion implanted surface layer of the bulk silicon. The silicon remains unheated between the ion implantation step and the anodic oxidation step. The device 10 has a rectifying p-n junction in the porous silicon region 22.
    公开号:KR19980703224A
    申请号:KR1019970706628
    申请日:1996-03-15
    公开日:1998-10-15
    发明作者:레이 트레보 카남；티모시 안그람 콕스；아르만도 로니；안드류 존 시몬스；리차드 시몬 블라커
    申请人:에스 알 스켈턴；더 세크레터리 오브 스테이트 포 디펜스；
    IPC主号:
    专利说明:

    Electroluminescent Devices Including Porous Silicon
    The light emitting device may emit light by various processes. Conventional tungsten wire incandescent light bulb emits visible light when the element of the incandescent light bulb reaches a certain temperature. Radiation of visible light from high temperature materials is called incandescent. Luminescence is a phenomenon different from incandescent, which occurs when electrons lose energy radiantly when moving from an excited energy state to a lower state, which may be a ground state. Fluorescence is light emission from electrons that absorb photons and are excited at high energy levels. Fluorescent porous silicon is described in US Pat. No. 5,438,618. Electroluminescence is light emission from electrons that are excited to higher energy levels by electric fields or currents. Examples of electroluminescent porous silicon are detailed in British Patent GB2268333B.
    Light emitting diodes are an important field of electroluminescent devices. Light emitting diodes are generally made of semiconductor materials of Ga 1-x Al x AS, Ga 1-x In x As 1-y P y and GaAs 1-x P x systems. The efficiency criterion of a light emitting diode is the external photon efficiency, which is defined by dividing the number of photons generated by the diode by the number of electrons entering the diode. Devices made of such materials may have an external quantum efficiency of at least 10%. Electroluminescent devices made from GaAs compounds have the disadvantage of being difficult to integrate into silicon-based collector circuit technology and single crystals. The ability to produce electroluminescent devices compatible with silicon based integrated circuit technology has been an important goal for many years for those skilled in the semiconductor arts.
    The worldwide interest in the possibility of using porous silicon as a luminescent material for electroluminescent devices was generated by a paper by L.T.Canham, 1990, Applied Physics, Vol. 10, pages 1046-1048. The paper reported that efficient visible electroluminescence occurred from quantum wires of porous silicon at room temperature. Silicon quantum wires are physically less than 10 nm wide, more than twice their width, and the boundaries of silicon are surrounded by appropriate passivation. Can be defined as a continuous column. Porous silicon electroluminescent devices offer the advantage that they are inherently compatible with silicon integrated circuit fabrication techniques used in applications such as optical displays and optoelectronic integrated circuits.
    Electroluminescent porous silicon as described above is described in British Patent GB2268333B. Global interest in electroluminescent porous silicon has been demonstrated by many scientific papers describing electroluminescent devices incorporating porous silicon. However, the luminous efficiency reported for the device was unfortunately low. In 1993, Vacuum Science and Technology A, Vol. 11, No. 4, pages 1736-1738, VPKesan et al. Reported a pn junction porous silicon electroluminescent device having an efficiency ranging from 0.04% to 0.1%. However, many devices other than Kessan have a critical current density of 30,000 Am −2 before electroluminescence becomes observable. This high threshold will appear to be inconsistent with the efficiency value mentioned. Further, there is no indication in Kesan et al. On whether the cited efficiency criterion is an external photon efficiency value or other efficiency such as internal photon efficiency. If the quoted efficiency is an internal photon efficiency, then the external photon efficiency will be much lower, perhaps 10 units lower.
    F. Kozlowski et al. In 1994 published a light emitting device of porous silicon with a photon efficiency of 0.01% in Sensors and Actuators A, A43, pp. 153-156. However, this paper only provides details of the electrical characteristics of the light emitting device having photon efficiency in the range of 10 −3 to 10 −14 %.
    LVBelyakov et al. Reported in 1993 that the luminous efficiency was up to 0.3% for electroluminescent porous silicon devices biased as cathodes containing liquid electrolyte in Semiconductors Vol. 27, Nos. 11-12, pages 999-1001. . They also announced that they observed electroluminescence at a current density of 200 Am −2 . Devices containing liquid electrolytes will be difficult to integrate with conventional silicon based microcircuits.
    Lang et al. Described the electroluminescent device having a thin gold foil electrode in 1993, pp. 57, 169-173. Lang et al observed electroluminescence above a critical current density of 1.1 Am −2 and measured an external photon efficiency of 0.01%. They estimate that their device had an internal efficiency greater than 0.1%. The external efficiency value is a measure of the efficiency of generating photons outside the device and is different from the internal efficiency value, which is a measure of the efficiency of generating photons in the device. Internal efficiency values will be higher than external efficiency values due to internal absorption and scattering mechanisms.
    All scientific articles published for porous silicon light emitting diodes relate to device performance during operation in the atmosphere. Badoz et al., Published in the Seventh International Symposium on Silicon Materials Science and Technology, pp. 94-10, pages 569-574D, at the Electrochemical Society in Pennington, NJ, 1994 Exception. They demonstrated that the stability of inefficient (external quantum efficiencies 10 -4 %) porous silicon light-emitting diodes is significantly improved when operated in nitrogen gas that is drier than the atmosphere. They claim that decay results from the electrically enhanced oxidation of the silicon tissue.
    When the p-type silicon is polarized, a scientific paper has been produced that claims that n-type porous silicon is produced. N.J.Pulsford et al. Announced the polarization of a 25 cm square p-type silicon substrate in 1993 in luminescent magazine Vol. 57, pages 181 to 184. In measuring the global properties of porous silicon, they concluded that porous silicon is n-type. Amisola et al., 1992, Journal of Applied Physics, vol. 61, no. Released the measurement.
    Using the method described in U.S. Patent No. 5,348,613, the diffusion resistance of porous silicon with 30% porosity generated from bulk doped p-type silicon increases with increasing depth. Able to know. This corresponds to an increase in resistance with increasing depth. This is contrary to the nature of porous silicon produced from bulk doped n-type silicon, which represents an n-p type junction formed in porous silicon (silicon interface). Previously known writings describing the generation of electroluminescent devices by anodizing pn silicon structures are not pn junctions formed in porous silicon at locations corresponding to the original pn interface but instead between porous silicon and bulk silicon. It shows a heterojunction.
    The present invention relates to an electroluminescent device and in particular to an electroluminescent device made of a porous silicon material.
    1 is a schematic vertical cross-sectional view of an electroluminescent device of the present invention.
    2 is a graph showing the configuration of boron impurity concentration in a silicon wafer after ion implantation determined by a second ion mass spectrometer;
    3 schematically shows a cross section of a silicon wafer after boron implantation.
    4 is a schematic illustration of anodization equipment for anodizing an implanted wafer.
    FIG. 5 shows the device after electrical contact with the device of FIG. 1. FIG.
    6A is a view showing a light output measuring device.
    6B shows an optical output device for measuring the output efficiency of the device of FIG.
    FIG. 6C schematically illustrates an arrangement for measuring the configuration of the device of FIG. 6B. FIG.
    FIG. 7 graphically depicts electroluminescence and fluorescence measurements of the device of FIG.
    8 shows measured electrical characteristics of the device of FIG.
    9 illustrates another electrical feature of the device of FIG.
    10 shows the measurand for the light output from the device of FIG. 1 as a function of applied current density.
    11 is a graph of external quantum efficiency versus current density for a device of the present invention.
    Figure 12 shows the output efficiency as a function of time for the device of the present invention.
    FIG. 13 shows the output efficiency as a function of time for a device having indium tin oxide top contact 200 nm thick;
    14 shows modulated light output from a device of the present invention.
    15 shows the configuration of the modulation amplitude of electroluminescence as a function of drive frequency.
    FIG. 16 shows the configuration of the boron impurity concentration of the apparatus of FIG. 1 after anodizing; FIG.
    FIG. 17 shows the configuration of the boron impurity concentration after anodizing for a device cooled by heat between boron implantation and anodizing.
    18 schematically shows a possible structure of the device of the invention.
    FIG. 19 is a schematic illustration of a possible band structure of the device of FIG. 1; FIG.
    FIG. 20 schematically illustrates possible band structure after applying a bias voltage to an adder. FIG.
    It is an object of the present invention to provide another electroluminescent device.
    The present invention provides an electroluminescent device that is biasable to generate electroluminescence and includes an electroluminescent porous silicon region and an electrical connection to the porous silicon region, wherein a current having a current density of less than 1.0 Am −2 is applied to the device. Electroluminescence from the porous silicon region is detected when the device is biased to flow.
    The present invention has the advantage that a low threshold current is required to generate electroluminescence. Low threshold currents are advantageous for applications where power conservation is essential, for example electronics where current is supplied by batteries.
    The device of the present invention can be manufactured by a method comprising the step of anodizing a silicon wafer that is not heat cooled after impurity implantation. In general, the silicon wafer is subjected to an impurity implantation to electrically activate the impurity, followed by heat cooling to heat cool the damage caused to the lattice structure by the implantation process. Anodizing the wafer after impurity implantation without a heat-cooling step would be a surprising process for anyone familiar with silicon processing techniques.
    The device electroluminesces when biased such that a current having a current density of less than 0.1 Am −2 can flow through the device. Electroluminescence from the device is visible to the naked eye when the current density is less than 0.1 Am −2 . EL is the electric current density can be detected as low as less than -2 0.0001Am 0.01Am -2. The external quantum efficiency of the electroluminescence may be at least 0.1%. An external quantum efficiency of 0.4% was measured for the device operating at 200K (-73 ° C). The combination of high efficiency and low threshold current is particularly good. A device with an area of 1 mm 2 operating under a bias current density of 0.0001 Am −2 would require a bias current of only 10 −10 amps or 0.1 nA to produce detectable light emission.
    On the other hand, the present invention provides a solid state electroluminescent device comprising an electroluminescent porous silicon region and an electrical connection to the porous silicon region, the device having an electric field from the porous silicon region with an external quantum efficiency of greater than 0.01%. And biasable to generate light emission.
    Higher external quantum efficiencies are good because more efficient devices for a given intensity of light require lower efficiencies.
    The solid state device of the present invention is electroluminescent with an external quantum efficiency of greater than 0.1%. The external quantum efficiency may range from 0.01% to 0.18%, and may be at least 0.4%.
    The solid state device of the present invention includes an n-type porous silicon region having a p-n junction between the p-type porous silicon region and the p-type porous silicon. As mentioned above, conventionally produced porous silicon is n-type, although the initial material is p-type silicon. Thus, previous electroluminescent porous silicon devices that include p-n junctions in porous silicon may have some other form of bonding at the interface between the top contact and the porous silicon or between the porous silicon and the unanodized bulk silicon.
    At least one region of the p-type and n-type porous silicon regions may be surface doped. Surface doped porous silicon is porous silicon doped by impurities deposited on the surface of the silicon structure forming the porous silicon. The impurities may remain on the surface or diffuse into the silicon. The p-type porous silicon may be surface doped and the surface impurity may be boron. The device can be electroluminescent with an external quantum efficiency of greater than 0.1%.
    The device of the present invention can couple an injection layer for injecting holes into the light emitting region of the porous silicon. The injection layer may be a surface layer of porous silicon. The surface area of the porous silicon can have elevated levels of oxygen, carbon and fluorine and thus can have a wider band gap than the light emitting area of the porous silicon and can act as an effective hole injector.
    The device of the present invention can be produced by light assisted anodic oxidation in aqueous hydrofluoric acid. According to the known art, light assisted anodization in ethanol hydrofluoric acid may yield mesoporous porous silicon. Hollow porous silicon has holes larger than 20 microns wide and smaller than 500 microns wide. It is known that the light assisted anodic oxidation of the n − silicon substrate may generate some pores. Porous porous silicon has pores larger than 500 mm wide. The anodic oxidation conditions of the device of the present invention ensure that pores and hollow porous silicon are not produced. The active part of the device is a pore less than 20 mm 3 in width.
    The electroluminescent device includes an n-type bulk silicon region, an n-type porous silicon region adjacent to the n-type bulk silicon region, a p-type porous silicon region adjacent to the n-type porous silicon region, the bulk silicon region and the p-type porous silicon region It may include an electrical contact for.
    The apparatus of the present invention can be operated to generate modulated light output. The light output may be modulated at a frequency of 10 Hz or more. The device showed that modulation of the light output was observed at modulation frequencies up to 1 MHz. The device of the present invention has a maximum electroluminescence intensity at wavelengths of 400 nm to 900 nm. The maximum electroluminescence intensity will be in the wavelength range of 520 nm to 750 nm.
    Since the operating efficiency of an unencapsulated device can be degraded upon exposure to water vapor or oxygen, the device of the present invention can be an encapsulated device, so that the porous silicon is protected from the environment. The encapsulation can be accomplished by another type of encapsulation device, such as a vacuum chamber or an impermeable top contact to porous silicon of indium tin oxide.
    The device may be integrated into another silicon device as part of an optical electrical integrated circuit. The electroluminescent device of the present invention can be combined with other devices of the present invention to form a display capable of producing a light output having a plurality of colors.
    On the other hand, the present invention
    (i) injecting acceptor impurities into a surface region of a silicon wafer doped with donor impurities to make the wafer n-type, wherein the surface region has a volume concentration of acceptor impurities greater than the volume concentration of donor impurities;
    (ii) anodizing the wafer under illumination to create a luminescent porous silicon region extending through the surface region;
    (iii) depositing an electrode on said porous silicon region,
    The surface area is to provide a method of manufacturing an electroluminescent device, characterized in that it has a sheet resistivity of greater than 100 kHz -1 before the anodizing step.
    On the other hand, the present invention
    (i) injecting acceptor impurities into a surface region of a silicon wafer doped with donor impurities to make the wafer n-type, wherein the surface region has a volume concentration of acceptor impurities greater than the volume concentration of donor impurities;
    (ii) anodizing the wafer under illumination to create a luminescent porous silicon region extending through the surface region;
    (iii) depositing an electrode on said porous silicon region,
    It is to provide a method of manufacturing an electroluminescent device, characterized in that less than 1% acceptor impurities are electrically activated before the anodic oxidation step.
    On the other hand, the present invention
    (i) acceptor impurities are implanted into a surface region of a silicon wafer doped with donor impurities to make the wafer n-type so that the surface region has a volume concentration of acceptor impurities that is greater than the volume concentration of donor impurities; At least a portion having an acceptor impurity volume concentration similar to the solid solubility of the acceptor impurity in silicon,
    (ii) anodizing the wafer under illumination to create a porous silicon region extending through the surface region;
    and (iii) depositing an electrode on the porous silicon region.
    On the other hand, the present invention
    (i) injecting acceptor impurities into a surface region of a silicon wafer doped with donor impurities to make the wafer n-type, wherein the surface region has a volume concentration of acceptor impurities greater than the volume concentration of donor impurities;
    (ii) anodizing the wafer under illumination to create a porous silicon region extending through the surface region;
    (iii) depositing an electrode on said porous silicon region,
    It is to provide a method of manufacturing an electroluminescent device, characterized in that the silicon wafer is not heat cooled between steps (i) and (ii).
    On the other hand, the present invention
    (i) injecting acceptor impurities into a surface region of a silicon wafer doped with donor impurities to make the wafer n-type, wherein the surface region has a volume concentration of acceptor impurities greater than the volume concentration of donor impurities;
    (ii) anodizing the wafer under illumination to create a luminescent porous silicon region extending through the surface region;
    (iii) depositing an electrode on said porous silicon region,
    The anodizing step provides a method of manufacturing an electroluminescent device, wherein the surface doped quantum wire is doped to form a p-type by doping the surface of the silicon quantum wire in the porous silicon region.
    On the other hand, the present invention provides a p-type porous silicon having a porous silicon of 30% or more. The holes may be at least 60% and the porous silicon may comprise quantum wires.
    The present invention provides porous silicon that is almost entirely pore and visually luminescent, which is derived from n-type bulk silicon.
    On the other hand, the present invention provides an electroluminescent device comprising a porous silicon region and an electrical contact to the porous silicon region, characterized in that it comprises a p-n junction therein.
    In another aspect, the present invention provides an electroluminescent device comprising a porous silicon region and an electrical contact to the porous silicon region, characterized in that the visible light emitting region is generally microporous made of n-type bulk silicon.
    Embodiments will be described in detail with reference to the accompanying drawings in order to facilitate understanding of the present invention.
    1 shows an electroluminescent device 10. The device 10 comprises a silicon substrate 20 on which a luminescent porous silicon region 22 is placed. 1 is not shown in a consistent analogy as represented by the discontinuities 23. The device 10 comprises a top electrode 24 of transparent indium tin oxide and a bottom electrode 26 of aluminum. The silicon substrate 20 includes a large amount of doped regions 28 to form ohmic contacts with the bottom electrode 26. The porous silicon region 22 has an average thickness of 0.4 μm, the upper electrode 24 has a thickness of 0.1 μm, and the bottom electrode has a thickness of 0.5 μm. When a dc current passes between two electrodes 26 and 24, the device 10 emits light at a maximum wavelength in the range of half maximum width of 60 nm to 150 nm and total width of 520 to 750 nm.
    The device 10 is manufactured as follows. In a first step, a massively doped resistive contact region 28 is formed. The formation of largely doped regions to form resistive contacts is the basis of silicon integrated circuit processes. Resistivity of the n-type doped with a small amount of 10 to 20Ω㎝ (n - indicated by) the back face of the silicon wafer diameter is 75nm is implanted at an energy of 70keV at an (Varian), 350 RD ion beam implanter with a donor impurity at Is injected by. Donor impurities are caused and injected at a concentration of 5 × 10 15 cm −2 . Following ion implantation, the implanted wafer is purified by washing the wafer in two chemical baths. The wafer was immersed in a first bath containing 300 ml of 35% NH 3 solution, 300 ml of 30% H 2 O 2 solution and 1500 ml of unionized water at a temperature of 88 ° C. for 15 minutes and then 88 ° C. In a second bath containing 300 ml of 35% HCl solution, 300 ml of 30% H 2 O 2 solution and 1500 ml of unionized water for 10 minutes. After being immersed in the two baths, the wafer is washed with deionized water and dried. After purification, the implanted wafer was heated and cooled in oxygen containing 2% argon at 1050 ° C. for 30 minutes to form a thin surface oxide layer on each side of the wafer having a thickness of about 60 μs.
    In the second step, acceptor impurities are implanted into the front of the silicon wafer. The acceptor impurity is boron. Boron is implanted into a Varian 350 RD ion beam implanter having an ion beam energy of 35 keV, a beam current of 250 mA and a beam size of about 0.2 × 1.0 mm 2. The ion beam is scanned across the front of the silicon wafer in a complex scan pattern for uniform impurity implantation of the surface. Each scan takes about 1 second. The wafer is implanted with impurities for 10 minutes, during which time it receives 1 × 10 16 cm −2 of impurities. During the injection time, it is fixed on the temperature sink, which prevents the temperature of the silicon from excessively increasing due to the injection. It is estimated that the temperature of the wafer does not exceed 120 ° C. during the second ion implantation step and the temperature of the wafer increases between 30 ° C. and 40 ° C.
    In a conventional integrated circuit process, a silicon wafer is heat cooled after ion implantation for recrystallization and any heat generated during implantation of the ions is heat cooled to electrically activate the impurities. Electrical activation of boron impurities occurs when the impurity atoms occupy alternate positions in the silicon lattice. However, in the current manufacturing process, the wafer is not heat cooled after ion implantation. Failure to heat-cool after the ion implantation process may be undesirable and meanwhile surprising to those skilled in the art of silicon integrated circuit processing because the impurities have low electrical activity and the silicon remains damaged. .
    Measurements of the sheet resistivity of the largely doped region 28 after heating and cooling and the sheet resistivity of the front face after ion implantation were made. The sheet resistivity of the region 28 is 16 kV -1 compared with the estimate for the resistivity 10 kV -1 of the fully activated impurity implantation. Thus, within the experimental error range, impurities in the heavily doped region 28 are fully activated. After ion implantation, the sheet resistivity of 1800Ω -1 front is compared to the value 10Ω -1 is estimated when the impurity is fully active. The conductivity of the implanted boron layer, which is not heat cooled, is 1% less than expected when the impurities are fully electrically activated. It was found by electron microscopy that the lattice structure of the implanted silicon was severely damaged by the implantation of boron ions.
    The ion implanted silicon wafer was measured using a second ion mass spectrometer (SIMS) to determine the distribution of boron in silicon. 2 shows a plot 100 of impurity concentrations (atoms cm −3 ) versus depth (mm) from the front side. According to the SIMS measurement, it can be seen that the peak reaches an impurity concentration 102 of 8 × 10 20 atoms cm −3 at a distance of 120 nm from the front downward. Boron has a maximum solid solubility in silicon of about 5 × 10 20 atoms cm −3 at 1200 ° C. Thus, the maximum impurity concentration 102 can be compared to the solid solubility limit of boron in silicon. The implanted silicon has a damaged area associated with the implanted boron. The damaged area is expected to have maximum damage at slightly deeper than the peak of the impurity concentration 102. 3 schematically shows a silicon wafer 110 after a second ion implantation process. The wafer 110 has a first region 112 that is heavily doped with n-type impurities represented by n + . The second region 114 is doped to be a p-type region. The remaining area 116 has n − doping of the original wafer. Since impurities in region 114 are not electrically fully active, it is difficult to determine the location for interface 120 between p-type region 114 and n − region 116. The interface 120 is less than 600 nm from the front face 122.
    Following the second ion implantation step, porous silicon regions 22 are created by a light assisted anodization process. In the context of the production of porous silicon, anodization treatment is generally accepted as the term for the selective dissolution of an electrolyte of silicon. 4 is a schematic diagram of an anodization apparatus 200 for generation of porous silicon region 22. In the device 200, the silicon wafer 110 is housed in an anodization cell 212. The anode oxidation treatment cell 121 is PIFE. Silicon wafer 110 divides the cell into two debris baths 214 and 216. The electrolyte baths 214 and 216 each contain an electrolyte 218 containing 40 wt% HF solution in water (dedctronicgrade). The electrolyte 218 in each bath is ejected around each closed loop (not shown) for circulation.
    The anodic oxidation process is light assisted. To illuminate the first surface of the wafer 110, the anodizing cell 212 has a polycarbonate window 222 and a 800 W tungsten halogen lamp 224 is 24 cm from the surface 220, polycarbonate window. 14 points from 222. The water-cooled infrared absorption filter 226 is positioned between the lamp 224 and the window 222. The first surface 220 corresponds to the front side of the silicon wafer into which the p-type impurity is implanted. The intensity of light in the window 222 was measured using a calibrated silicon photodiode detector system comprising a Newport Model 840-C meter with a 818-ST detector. The scale of the meter was 130 mW cm -2 with a detector control device set at 900 nm wavelength compensation.
    Each bath 214 and 216 includes a respective platinum electrode 230 and 232. The electrode 232 has a gauze form in order to transmit light. In operation, electrode 232 is negatively biased to form a cathode and electrode 230 is positively biased to form an anode. A constant current source is connected between the anode and the cathode. In operation, anodizing current having anodic oxidation current density of 3 mAc -2 m at the silicon wafer surface 220 passes between the electrodes. The electrolyte is maintained at a temperature between 16 ° C and 17 ° C. The silicon wafer is anodized for 4 minutes. In the anodization process, a porous silicon region is created that extends through the p-type region 114 to the n-type region 116.
    The anodized silicon wafer remains in the HF containing electrolyte 218 for one minute after the anodization has been completed and the anodic oxidation current is switched off but still under illumination. The wafer is removed from the debris and the wet wafer is then dried by rotating in air at a rate of 250 orpm for 30 seconds. The rotation process is repeated six times. Under the above production conditions, silicon of large pores (pores having a diameter of 50 nm or more) was not observed under an electron microscope.
    The thickness of the porous silicon region after drying was measured by observing the cross section of the silicon wafer in the SEM and chemically removing the portion of the porous silicon region from the silicon wafer using NaOH solution, and in the resultant step, the thickness of the porous silicon region was removed using a scanning probe height measuring device. It was measured by measuring the height between the area and the area that was not removed. The thickness of the porous silicon region across the wafer was measured to be 0.4 μm ± 0.1 μm. The average porosity of the porous silicon region was 70% ± 5% as measured using a weight specific technique.
    After making the porous silicon region, a wafer operation of 20 mm by 15 mm in size is cleaved from the center of the silicon wafer. Top and bottom electrodes 24 and 26 are then deposited onto the wafer operation. The top electrode 24 is immersed on the porous silicon region 22 by rf electron tube sputtering using a 2 inch sputter target comprising 90% In 2 O 3 and 10% SnO 2 compounds from CERAC. The sputtering is performed at 50 watts of sputtering power in a flowing sputtering gas containing 0.09% oxygen in argon at an rf frequency of 13.56 MHz at room temperature and 6 cm away from the target and at a pressure of 8 × 10 −3 mbar. Was made using. Indium tin oxide (ITO) films were deposited through a shadow mask to form spots between 1 mm and 2 mm in diameter and 0.1 μm in thickness for a 15 minute precipitation period during which the wafer operation was performed at a temperature of about 60 ° C. Warms up. Precipitating ITO having the necessary characteristics in an argon sputtering gas having a pressure range of 2 × 10 −3 to 1.6 × 10 −2 , a separation distance of the target wafer of 1 to 15 cm, and containing 0.01% to 0.3% oxygen It is possible.
    Precipitated ITO films typically have an optical transmission coefficient of 85% for light in the wavelength range from 400 to 900 nm and transmittance dependent on thickness. The ITO film was measured to determine its characteristics using a hole measuring device and appeared to be n-type with an electrical resistivity of 1.6 mPacm. Measurement of FTIR absorption behavior through ITO contact shows that the silicon hydrogen bonds present in the anodized material are still present after ITO precipitation. There is also no evidence for significant oxidation of the structure during ITO precipitation. The ITO layer may be transmissive depending on its thickness. Chemical measurements of samples with ITO layers with a thickness of 0.1 μm indicate that the ITO is permeable, while measurement of samples with a thickness of 0.2 μm shows significantly lower transmission. The technique is described in 1994 in L.T.Canham et al. In the chemical measurement, the unexposed photographic film is developed in contact with the sample in the dark for one cycle. When the porous silicon is in contact with the photographic peel, the silane produced by the reaction between the porous silicon and the moisture in the air reacts with the photosensitizing chemical on the photographic film to form a dark image after development. The creation of an image with an ITO cover sample indicates that the ITO is permeable and at least the silane passes through the ITO, possibly with water vapor in the opposite direction.
    The bottom electrode 26 is deposited on the bottom of the wafer using a thermal evaporation process. Aluminum is concentrated to a thickness of 0.5 μm in a vacuum of about 10 −6 mbar. In conventional integrated circuit fabrication, the concentrated resistive contacts were heat cooled in a mixed gas of nitrogen and hydrogen, such as from 425 ° C to 450 ° C. The heat cooling treatment was not performed with the creation of an ohmic contact with the device 10. Precipitation of the bottom electrode is not an essential step in the fabrication of porous silicon electroluminescent devices. The device may be fabricated to emit light by direct electrical contact with a large amount of doped region 28.
    In order to obtain light emission from the device 10, electrical contact is made at the top and bottom electrodes 24 and 26. 5 shows a device in electrical contact with top and bottom electrodes 24 and 26. Electrical contact to the bottom electrode 26 is made by a metal alligator clip 300 to which a wire 302 is attached. A mica 310 is positioned between the clip 300 and the porous silicon region 22 to protect the porous silicon and to electrically insulate between the clip 300 and the porous silicon region 22. Electrical contact to the top electrode 24 is made by a Waye probe 302 of curved gold with a diameter of 30 mm. The wire 302 and probe 312 are connected to a computer controlled power source (not shown).
    An apparatus 400 for measuring the light output from the apparatus 10 as a function of current and a voltage applied through the apparatus is shown in FIG. 6. Light output measurements are generally made at room temperature but can also be made at high or low temperatures. The device 10 is located in a vacuum chamber 410 having a glass window 412. Electrical contact to the probe 312 and wire 302 is through a feedthrough 414. The chamber 410 is evacuated to a pressure of about 0.05 mbar as measured with a graduated capacitance manometer through a portion 416 connected to a rotary pump (not shown). An imaging system 420 in which the CCD camera 424 and the photomultiplier tube 426 are connected may be used to observe the radiation of light from the device 10. The photomultiplier tube 426 may be replaced by an optical multichannel analyzer (not shown). The beam splitter 428 of the microscope 422 decomposes the light received between the camera 424 and the photomultiplier 426. A blue high intensity beam having a wavelength of 442 nm coming from the laser 430 may be directed onto the device 10 for fluorescence measurement. During fluorescence measurement, cutoff filter 432 is inserted into microscope 422 to filter blue light from the laser 430.
    In order to measure the output efficiency of the device 10, the imaging system 420 can be replaced with a detection system 440 as shown in FIG. 6B. The detection system 440 includes an optical fiber 450 that receives light from the device 10 and directs it to the spectrometer 452. The input surface 454 of the optical fiber 450 is located at a position perpendicular to the center of the device at a distance x away from the device 10.
    The combination of the optical fiber 450 and the spectrometer 452 was determined to represent sensitivity as a function of wavelength using the arrangement shown in FIG. 6C. Input surface 454 is located at a distance d, about 3 meters from calibrated tungsten light source 456. The spectrometer 452 includes a multi-channel type diode array detector in which each channel corresponds to a desired wavelength range of λ n -Δλ / 2 to λ n + Δλ / 2. [Lambda] n , the center wavelength of channel n, is determined by measuring the number of channels of a peak of a known series of spectral features, such as a laser line. The recorded spectrum 458 is the measured intensity as the wavelength function I N (n, λ n ), where I N (n, λ n ) ranges from λ n -Δλ / 2 to λ n + Δλ / 2 It represents the number of counts per second in the channel n covering the. The subscript N indicates that the measured signal is a count per second.
    The light output from the light source 456 has already been calibrated in units of watts m -2 nm -1 for a 0.5 m distance from the light source to obtain a reference of the output as a function of wavelength, L (λ). The output L d (λ) at the distance d is obtained by multiplying L (λ) by (0.5 / d) 2 , where d is in meters.
    The signal measured in channel n corresponds to the power density at input surface 454 of L d (λ) .Δλ with units of watts m −2 . The power sensitivity of the channel n, S P (n, λ n ), is given by
    S P (n, λ n ) = (L d (λ) .Δλ) / I N (n, λ n )
    Here, Δλ represents the spectral width of each channel of the detector in nm.
    S P (n, λ n ) is in units of watts m −2 / (counts per second).
    The sensitivity of channel n of detector system 440 is represented by the photon flux density, S Q (n, λ n ),
    S Q (n, λ n ) = (L d (n, λ n ) .Δλ) / E P λn / I N (n, λ n )
    Here, E P λn is the energy of a photon having a wavelength of λ n is given as follows,
    E P λn = hc / λ n
    Where h is Planck's constant and c is the speed of light. The unit of E P λ n is photons sec −1 m −2 / (count per second).
    From the measurement of the light output by the device 10 at the distance x the intensity spectrum I N D (n, I n ) is obtained in counts per second. The number of light outputs at a distance x per m 2 per second, Q x is given by
    Q x = Σ n I N D (n, λ n ) .S Q (n, λ n )
    Here, the sum for n is the number of channels in the detector.
    The dependence of the output of the device 10 as a function of angle was measured up to ± 45 °. In each of the above ranges, it has been found that the intensity of the output is proportional to Lambertian, Cos (θ), where θ is the angle to the vertical component of the device. The output is also assumed to be Lambertian for an angle of 45 ° θ90 °.
    The total number of photon outputs per second from the Lambertian source, Q tot, is given by
    Q tot = Q x .π.x 2
    The output external quantum efficiency, EQE, for 100 representing the percentage of photons emitted from the device relative to the injected electrons is given by
    EQE = (100.Q tot ) .q / I
    Where q is the charge of electrons, the current through the device, I is in amps.
    The results of the electroluminescence and fluorescence measurements modified for the mechanical reaction are shown in FIG. 7. Graph 500 shows the output light intensity in arbitrary units versus wavelength. The result of the fluorescence measurement obtained by illuminating the device 10 with blue light emitted from the laser 430 is shown by line 510. The maximum value of fluorescence 512 at the intensity of the output was observed at a wavelength of about 610 nm. Typically, the maximum values of mold and output intensity are measured in the range of 600 to 750 nm. Visually under ultraviolet light, the porous silicon region exhibits orange fluorescence.
    The results of the electroluminescence measurements obtained by the dc current through the device 10 are shown in line 520. The maximum value of the electroluminescence of the output intensity 522 is observed at a wavelength of 590 nm. Thus, the maximum value of fluorescence 512 occurs at a wavelength longer than the maximum value 522 of electroluminescence. Typically, the maximum value of the output intensity of the electroluminescence is measured in the range of 520 nm to 750 nm and the half maximum spectral width is in the range of 60 nm to 150 nm.
    Electrical measurements of the device 10 have shown that it is forward biasable by applying a positive voltage to the rectification and top electrode 24. The polar dependence is the same as can be obtained from a device having a pn junction therein, so the p region of the pn junction is at the porous silicon side of the wafer. A log linear plot 550 of the electrical measurement of the device 10 representing the current as a function of the voltage applied through the device is shown in FIG. 8. In FIG. 8 the current-voltage characteristic of the device 10 is shown by the current density (Acm −2 ) over the applied voltage (volts). The applied positive voltage corresponds to a positive bias for the top electrode 24. 9 shows in greater detail the current-voltage characteristics of the device 10 when the device 10 is positively biased. 8 and 9 collectively show the device 10 rectifying with polarity dependence, such as a pn junction.
    The p-n junction diode can be characterized by the ideal factor, n, where
    n≡ (q / kT). (∂V / ∂ (lnJ),
    J is the current density and V is the potential difference of the diode. Ideally, a pn junction diode has a unique ideal factor. For device 10 where the value of the applied bias is less than 0.5V, the ideal factor of the diode of the device is two. For forward bias greater than 2V, a voltage dependent ideal factor greater than 10 was measured. Electroluminescence was detected from the device 10 by measuring the device 400 at an applied current density of 0.01 Am −2 corresponding to an applied voltage of about 2.6 volts in FIG. 9. Since the measured minimum current may be limited to the optical detection limit of the measuring device 400, the threshold current density at which the device 10 emits may be less than this number. Electroluminescence from the device 10 can be visually seen at an applied current density higher than an applied critical current density of 0.1 Am −2 . When the sensitivity of the detection device was better, light emission was detected at an applied current density of 0.0001 Am −2 with a corresponding threshold voltage of 1.7 V.
    Plot of the optical output power 600 is shown in Figure 10 as a function of the current density (A㎝ -2) is applied with respect to a similar device and the device 10 has an area of 0.01㎝ -2. Lines 610 and 612 are constant external photon efficiency. Also, any line parallel to lines 610 and 612 is a constant efficiency line. The line 610 corresponds to an external photon efficiency of 0.01% and the line 612 corresponds to an external photon efficiency of 0.1%.
    FIG. 11 shows a plot 660 of external photon efficiency versus current density for a device similar to the device 10. The plot 660 shows that the device has an output photon efficiency that is 0.01% greater than the applied current density of 0.01 Am −2 . The measured device had an external photon efficiency of at least 0.1% at the applied current density in the range between 0.2 Am −2 and 7.0 Am −2 . The device has an external photon efficiency of maximum room temperature of 0.18% at an applied current density of 1.0 Am −2 .
    The above results of efficiency have been obtained for devices operating in vacuum at a pressure of 0.05 mbar. The output efficiency of the device measured at two different vacuum pressures is shown in FIG. 12 as a function of time. Line 700 is a plot of the measurements performed at a pressure of 0.05 mbar. At 0.05 mbar, the output efficiency drops to a factor of 4 for 5 hours. Line 710 is a plot of the measurements performed at a pressure of 7.3 mbar. At 7.3 mbar, the efficiency drops to a factor of 100 for several minutes. The observed decrease in output efficiency is accompanied by an increase in the voltage required to maintain a constant current. If the device is operated in dry nitrogen compared to operation in less air, the reduction is reduced. Since the ITO contact to the device is transmissive, the active area of the device interacts with the surrounding environment. Thus, it can be concluded that the quantum efficiency of the device 10 is reduced by exposure to water or oxygen. The combination of the device 10 and the vacuum chamber 410 forms an encapsulated electroluminescent device.
    For an electroluminescent device having ITO replaced with a top electrode of gold, the gold should be as thin as translucent. However, chemical measurements show that gold with a thickness greater than 1000 kPa is necessary to prevent the ingress of moisture causing the reduction of the device. The thickness of the gold is so large that effective light emission through the top contact cannot be obtained.
    Electroluminescent devices having ITO top electrodes thicker than 0.1 μm exhibit only slightly different light emission characteristics between operation in air and operation in vacuum. FIG. 13 shows the change in efficiency over time for a device similar to the device 10 except that the top ITO electrode is 0.2 μm thick and less permeable than the top electrode 24. Line 720 represents the change in efficiency over time for a device operating in vacuum, and line 725 represents the change for a device operating in air. FIG. 13 shows that, in contrast to FIG. 12, the reduction of a device having a thicker ITO top electrode operating in air is not very different from that of a similar device operating in vacuum. Note that the current density applied to the apparatus for obtaining the result shown in FIG. 13 is much higher than the current density for obtaining the result shown in FIG. 12, and thus the reduction was much faster.
    The external photon efficiency of the electroluminescent device measured as a function of temperature showed a maximum external photon efficiency of 0.4% at a temperature of 200K (-73 ° C).
    A graph 750 of output power as a function of time for a device similar to the device 10 in which the dc bias voltage is modulated by a 10 Hz square wave is shown in FIG. 14. 14 shows the modulation of the light output of the device in response to the modulation of the applied voltage. 15 is a plot of the results of modulated output at modulation frequencies up to 1 MHz. 15 shows that the modulated output can be detected at frequencies up to 1 MHz.
    To determine how boron impurities are distributed in the device 10, SIMS was used to measure the distribution of boron through the porous silicon region 22. FIG. 16 shows a plot 800 of the concentration of boron versus depth for the silicon wafer after the first and second ion implantation, after the anodization and drying steps, and before precipitation of the top and bottom electrodes. The plot 800 shows a flat region 812 with a constant peak 810 and a constant boron concentration near the surface of the porous silicon. The approximate interface location between porous silicon and bulk silicon is indicated by dashed line 814. 16 also shows a plot 820 of the fluorine concentration and a plot 822 showing the second ion count of silicon measured.
    Compared to FIG. 16, FIG. 17 shows a plot 850 of boron concentration as a function of depth for a silicon wafer heat-cooled between a second ion implantation and an anodization treatment after a 5 minute anodic oxidation treatment. The heat cooling includes heating the wafer in nitrogen at 525 ° C. for 60 minutes and then soaking the wafer in relaxed HF to heat the wafer in oxygen at 950 ° C. for 60 minutes and remove the oxide layer. Plot 850 shows a similar picky to plot 800, but there is no plateau, such as plateau 812. Plot 850 shows a boron concentration floppy similar to that shown by SIMS measurements performed on wafers after heat cooling and before anodizing. 15 also shows a plot 862 of the second ion count of silicon. Although the heat cooled sample after the second ion implantation did not show electroluminescence, the efficiency of the electroluminescence was lower than that for the sample that was not heat cooled.
    16 and 17 with respect to the presence or absence of the planar region 812, if boron is implanted prior to anodizing and the wafer is not heated and cooled, then the movement of boron impurities during the anodic oxidation process It can be concluded that it is more pronounced. The boron may be transported through the liquid anodized electrolyte or in silicon.
    If boron migration occurs during the anodic oxidation process, the following mechanism for the creation of p-n junctions in porous silicon is expected. Once a hole is created in p-type region 114, the hole extends into region 116. When formed, the porous silicon of region 116 is originally n-type. As the anodization progresses and the depth of the porous silicon region increases, the n-type porous silicon is doped by boron transferred from the p-type region 114 to become p-type porous silicon. Finally, near the interface between the bulk silicon and the porous silicon, it is assumed that there is a newly formed n-type porous silicon region and that the porous silicon is doped to p-type by boron transferred toward the surface of the wafer. This will create a p-n junction in the porous silicon region. At the end of the anodization process, the n-type porous silicon region remains close to the bulk silicon wafer silicon interface, and the p-n junction of the porous silicon region survives after the anodization process. Luminescent porous silicon is produced only when the anodization front extends into region 116. It is therefore believed that p-n junctions are produced in the region of luminescent porous silicon.
    In order to investigate the formation mechanism for the p-n junction in the porous silicon region, an experiment was conducted to investigate the effect of the conversion of the anodization time. The sample was heated and cooled for different time t and after anodizing, the sample was left in the anodized debris and the same filtering effect as obtained when the wafer was anodized for 5 minutes after the porous silicon region was formed. It was illuminated for 5 minutes after anodization to obtain. While producing the device 10, a good anodization time is 4 minutes and involves 1 minute of filtration. After preparation, fluorescence and electroluminescence measurements are performed on a device made of the anodized silicon. The measurements are summarized in Table 1.
    The following are the results obtained from the information given in Table 1. Table 1 shows that the device made from the anodized wafer was significantly rectified after anodizing for at least 2 minutes. This suggests that the p-n junction, which is characteristic of the device 10 responsible for the rectifying action, is at least at the same depth as the depth of the porous silicon formed after the anodic oxidation treatment for 2 minutes, or about 0.15 μm. There is also a marked change in the power value required for electroluminescence that can be detected during anodization treatment of 2 to 3 minutes.
    TABLE 1
    The electroluminescent device was made of a boron ion implanted silicon wafer different from the device 10. The wafer for the device 10 was given 1 × 10 16 cm −2 of boron impurity. The external quantum efficiency of the device made of a wafer with impurities of 3 × 10 16 cm −2 was approximately 0.026%. The external quantum efficiency of the device made of a wafer with impurities of 3 × 10 16 cm −2 was approximately 0.062%. The efficiency of the device fabricated with a wafer containing more or less impurities than the impurity for manufacturing the device 10 was significantly lower. However, there are many process conditions, each of which can be changed, and changing other process conditions with changes in boron impurities results in a much higher efficiency device.
    When ion implantation of boron is performed at a beam current of 25 mA instead of the standard 250 mA, both the electroluminescence and fluorescence from the device appear dark red than the normal red orange to the naked eye. In addition, when the device was manufactured according to a good process, it initially showed a red-orange electroluminescence visually and then electroluminescence, which is green yellow after being stored in air for a week. The observation suggests that the fabrication process of producing an electroluminescent device suitable for color displays can be adjusted. Since the device 10 is made of a silicon wafer, the integration of non-light emitting silicon devices, such as transistors, into the device 10 on a single operation of silicon to form an optoelectronic integrated circuit will be a relatively straightforward process. . Since the silicon is not heated and cooled after acceptor impurity ion implantation, the silicon wafer region including the device which does not emit light can be manufactured before the electroluminescent device 10 can be produced, for example, by a low temperature plasma. Mask off with silicon nitride precipitated by an enhanced chemical vapor precipitation process.
    Materials other than ITO were used for the top electrode. Gold indium and aluminum were used and the efficiency was reduced while the device joining the top electrode of the material was electroluminescent. The bottom electrode 26 is not necessary for the operation of the device 10. The electroluminescent device without the bottom electrode is likely to be significantly different in high frequency operation, but operates slightly differently from the device 10 in terms of the d.c electrical characteristics of the device.
    Electroluminescent devices have also been fabricated by anodizing a wafer of n − silicon and then submerging the porous silicon in a boric acid solution to form a porous silicon region. SIMS measurements confirmed that boron was introduced into porous silicon at high concentrations, but the electroluminescent efficiency from the device manufactured by the method was low and had an external quantum efficiency of 0.002%.
    Sheet resistivity measurements suggest that less than 1% of the implanted boron is electrically active in the region 114 after ion implantation. Electrically measuring the device 10 reveals the behavior of the p-n junction diode. It can thus be concluded that the boron impurities are electrically activated after the anodic oxidation process. Since heat cooling is not performed after the boron ion implantation, the electrical activity of the boron impurities after the anodization treatment may vary depending on the surface doping of the quantum wire of porous silicon with the transferred boron. The term surface doping refers to the deposition of impurity species on the surface of quantum wires. Since the quantum wire is less than 30 microns in width, the impurity species can be retained on the surface to alter the band structure of silicon, which can diffuse a short distance into the quantum wire.
    The surface doping scenario was supported by an experiment of dipping n - porous silicon in boric acid. A possible microscope structure of the device 10 is shown in FIG. 18 in schematic form. FIG. 18 shows a fourth quantum wire 900 with one end coupled to the silicon substrate 910 and the ITO 920 layer lying at the other end. Each quantum wire 900 has a top region 930 that is part of the second region 114 of FIG. 3. During the anodic oxidation treatment, boron impurities are believed to migrate as the interface between porous silicon and bulk silicon proceeds. Some of the boron impurities precipitate in layer 940 on the surface of the quantum wire. Region 950, along with region 930 of each silicon quantum wire 900 adjacent layer 940, has p-type electrical properties as a result of the surface doping effect of layer 940. The region 960 of each quantum wire 900 that does not have a surface layer of boron impurity remains n-type. The interface between the n-type region of the quantum wire and the p-type region of the quantum wire is indicated by dashed line 970. Electron microscopy of the porous silicon region 22 after ion milling observed that the porous silicon had very small pores less than 3 nm wide and about 7 mm in diameter. Hole widths in the range of 15 mm to 30 mm have been previously observed. Very small holes can play an important role in the performance of the device. As reviewed by Carham and Grosszek in 1992, Applied Physics, Vol. 72, No. 4, pages 1558-1565, the width of the microporous silicon has a size of less than 20 μs. Microporous silicon is divided into supermicroporous silicon having a pore width of about 10 to 20 microns and ultramicroporous silicon having a pore width of less than 10 microns. The holes in the newly etched device structure are probably microporous and will be ultraporous once skeletal oxidized.
    It is well known that it is difficult to dry porous silicon structures having a pore size of less than 20 microns. SIMS measurements show high levels of fluorine in porous silicon. Thus, HF trapped in the hole may prevent the inner surface of the porous silicon from oxidizing before the device is operated.
    SIMS data indicate that the surface region of porous silicon region 22 has oxygen, carbon, and fluorine in addition to a large level of boron. Thus, although not strongly emitting, the surface area may have a similar or wider band gap for the split light emitting area beneath it. The surface area thus serves as an effective hole injection layer for the device 10. The hole injection efficiency is defined as the ratio of the minimum carrier current to the total current passing across the junction as described by SMSze on page 268 of the Physics of the Wiley and Sons semiconductor device, New York, 1981. It can be quantified by the minimum carrier injection ratio, g. The efficient hole injection layer can have a minimum carrier injection ratio, g of 10 −3 or more at a bias voltage of 5 volts or less. An external quantum efficiency of 0.1% corresponds to an internal quantum efficiency of approximately 1%, which means that the g value is at least 10 −2 . The virtual band structure 1000 of the device 10 in the unbiased state obtained using the simulation program of the device is shown in FIG. 19. In the device simulation, the following parameters were used.
    (a)-2 eV porous silicon band gap derived from the peak of the fluorescence spectrum,
    (b)-the electron affinity of 3.86 eV in T.Van Buuren et al., 1993, Applied Physics, Volume 63, page 2911,
    (c)-Combination of donors and acceptors of 0.35 eV and 0.65 eV, respectively, as described above in Van Buren et al. and C. Delerue et al. 1995 This Solid Films, Volume 255, page 636. energy,
    (d)-1995 Ann. Phys. by D.A.G Bruggeman. Dielectric constant of 3.8 for 75% space and 25% silicon,
    (e)-Active boron concentration profile inferred by SIMS measurement and multiplied by 0.01% to ensure that most boron impurities are not electrically active.
    Line 1002 represents the conduction band, line 1004 represents the balance band and line 1006 represents the Fermi level. The n-type bulk silicon has a band gap of 1.15 eV, as represented by region 1010 of band structure 1000. The n-type porous silicon zone structure is represented by region 1012 and the p-type porous silicon region band structure is represented by region 1014. ITO is n-type with a band gap of 3.7 eV and is represented by region 1016. The simulation heralds the p-n junction in porous silicon 400 nm deep from the ITO / porous silicon interface.
    20 shows the number of hypothetical band structures in which positive bias is applied to ITO for bulk n-type silicon. Most applied dislocations fall through the p-type porous silicon. Thus the conduction band of ITO shifts down with respect to the balance band of the p-type porous silicon. Electrons 1020 in the balance band of p-type porous silicon may then tunnel unoccupied in the conduction band of ITO, which is equivalent to injecting holes 1022 into the balance band of p-type porous silicon. Electrons 1026 from the conduction band of the n-type bulk silicon transition to the conduction band of the n-type porous silicon across the barrier 1028 between the n-type bulk silicon and the n-type porous silicon. The holes of the p-type porous silicon and the electrons of the n-type porous silicon transition toward the interface region between the p-type and n-type porous silicon. Within this region, electrons and holes can be recombined. The recombination may or may not be radial. About 90% of the photons generated by the radiation recombination are absorbed in the device 10. The rest is emitted and the result is electroluminescence which is visible to the naked eye.
    权利要求:
    Claims (58)
    [1" claim-type="Currently amended] In an electroluminescent device (10) comprising a porous silicon region (22) and electrical connections to the porous silicon regions (24, 26, 28, 20) that are biasable to generate electroluminescence,
    An electroluminescent device, characterized in that electroluminescence can be detected when the device is biased such that a current having a current density of less than 1.0 Am −2 flows through the device (10).
    [2" claim-type="Currently amended] An electroluminescent device according to claim 1, wherein electroluminescence can be detected when the device is biased such that a current having a current density of less than 0.1 Am −2 flows through the device.
    [3" claim-type="Currently amended] The electroluminescent device according to claim 2, wherein the electroluminescence is visible to the naked eye.
    [4" claim-type="Currently amended] The electroluminescent device according to claim 2, wherein electroluminescence can be detected when the device is biased such that a current having a current density of less than 0.01 Am −2 flows through the device.
    [5" claim-type="Currently amended] 5. The electroluminescent device of claim 4, wherein electroluminescence can be detected when the device is biased such that a current having a current density of less than 0.0001 Am −2 flows through the device.
    [6" claim-type="Currently amended] 6. The electroluminescent device of claim 1, wherein the device is biasable to produce an electroluminescence having an external quantum efficiency of greater than 0.1%. 7.
    [7" claim-type="Currently amended] 2. The electroluminescent device of claim 1, wherein the device is biasable to produce an electroluminescence having an external quantum efficiency of at least 0.4%.
    [8" claim-type="Currently amended] In a solid state electroluminescent device 10 comprising electrical connections to porous silicon regions 22 and porous silicon regions 24, 26, 28, 20,
    And the device is biasable to produce an electroluminescence having an external quantum efficiency greater than 0.01%.
    [9" claim-type="Currently amended] 9. The electroluminescent device of claim 8, wherein the device is biasable to produce an electroluminescence having an external quantum efficiency greater than 0.1%.
    [10" claim-type="Currently amended] 9. The electroluminescent device of claim 8, wherein the device is biasable to produce an electroluminescence having an external quantum efficiency in the range of 0.01% to 0.18%.
    [11" claim-type="Currently amended] 9. The electroluminescent device of claim 8, wherein the device is biasable to produce an electroluminescence having an external quantum efficiency of at least 0.4%.
    [12" claim-type="Currently amended] The electroluminescent device according to claim 8, comprising a light emitting porous silicon region and an electrical connection to the porous silicon region.
    And the porous silicon region comprises an n-type silicon region (960) having a p-n junction between the p-type porous silicon region (930, 950) and the p-type porous silicon region.
    [13" claim-type="Currently amended] 13. The electroluminescent device of claim 12, wherein at least one of the p-type and n-type porous silicon regions (930, 950, 960) is surface doped.
    [14" claim-type="Currently amended] The electroluminescent device of claim 13, wherein the p-type porous silicon region (930, 950) is surface doped.
    [15" claim-type="Currently amended] The electroluminescent device according to claim 14, wherein the surface impurity is boron.
    [16" claim-type="Currently amended] 16. The electroluminescent device of claim 12, wherein the device is biasable to produce an electroluminescence having an external quantum efficiency greater than 0.1%.
    [17" claim-type="Currently amended] 13. The electroluminescent device of claim 12, wherein the device is biasable to produce an electroluminescence having an external quantum efficiency of at least 0.4%.
    [18" claim-type="Currently amended] 9. An electroluminescent device according to claim 1 or 8, wherein the device comprises an injection layer capable of effectively injecting holes into the light emitting region of the porous silicon.
    [19" claim-type="Currently amended] 19. The electroluminescent device of claim 18, wherein the injection layer is a surface region of porous silicon.
    [20" claim-type="Currently amended] 20. The electroluminescent device of claim 19, wherein the injection layer has a minimum carrier injection ratio of greater than 10 -3 at a bias voltage of less than 5 volts.
    [21" claim-type="Currently amended] 20. The electroluminescent device of claim 19, wherein the injection layer has a minimum carrier injection ratio of greater than 10 -2 at a bias voltage of less than 5 volts.
    [22" claim-type="Currently amended] 22. The electroluminescent device of claim 18, wherein the device is biasable to produce electroluminescence having an external quantum efficiency greater than 0.1%.
    [23" claim-type="Currently amended] 19. The electroluminescent device of claim 18, wherein the device is biasable to produce an electroluminescence having an external quantum efficiency of at least 0.4%.
    [24" claim-type="Currently amended] The electroluminescent device according to claim 1 or 8, wherein the porous silicon region (22) is microporous.
    [25" claim-type="Currently amended] 25. The electroluminescent device of claim 24, wherein the device is biasable to produce an electroluminescence having an external quantum efficiency of greater than 0.1%.
    [26" claim-type="Currently amended] 25. The electroluminescent device of claim 24, wherein the device is biasable to produce an electroluminescence having an external quantum efficiency of at least 0.4%.
    [27" claim-type="Currently amended] The device of claim 12, wherein the device is
    a) an n-type bulk silocon region 910,
    b) an n-type porous silicon region 960 adjacent the n-type bulk silicon region,
    c) p-type porous silicon regions 930 and 950 adjacent to the n-type porous silicon region,
    d) an electroluminescent device comprising contacts (920, 26, 28) for bulk silicon regions and p-type porous silicon regions.
    [28" claim-type="Currently amended] The method according to any one of the preceding claims,
    And the device is operable to generate modulated light output.
    [29" claim-type="Currently amended] 29. The electroluminescent device of claim 28, wherein said light output is modifiable at a frequency greater than 10 kHz.
    [30" claim-type="Currently amended] 30. The EL device of claim 29, wherein the light output is modifiable at a frequency of 100 Hz.
    [31" claim-type="Currently amended] 30. The EL device of claim 29, wherein the light output is modifiable at a frequency of 1 MHz.
    [32" claim-type="Currently amended] 9. An electroluminescent device according to claim 1 or 8, wherein the electroluminescence from the device has a maximum intensity (522) at wavelengths of 400 nm to 900 nm.
    [33" claim-type="Currently amended] 33. The EL device of claim 32, wherein the maximum intensity (522) is at a wavelength in the range of 520 nm to 750 nm.
    [34" claim-type="Currently amended] 9. Electroluminescent device according to claim 1 or 8, characterized in that the porous silicon region (22) has a depth of less than 0.5 mu m.
    [35" claim-type="Currently amended] 9. An electroluminescent device according to claim 1 or 8, wherein the device is encapsulated.
    [36" claim-type="Currently amended] 36. The electroluminescent device of claim 35, wherein the device is protected against oxidation of porous silicon before and during operation of the device.
    [37" claim-type="Currently amended] 37. The electroluminescent device of claim 36, wherein said protection is provided by a contact (24) for porous silicon.
    [38" claim-type="Currently amended] 38. The electroluminescent device of claim 37, wherein the top contact (24) is an indium tin oxide layer.
    [39" claim-type="Currently amended] 36. The electroluminescent device of claim 35, wherein the device is biasable to produce an electroluminescence having an external quantum efficiency of greater than 0.1%.
    [40" claim-type="Currently amended] 36. The electroluminescent device of claim 35, wherein the device is biasable to produce an electroluminescence having an external quantum efficiency of at least 0.4%.
    [41" claim-type="Currently amended] The method of claim 1, wherein
    And the device is integrated into another silicon device.
    [42" claim-type="Currently amended] In a light emitting display,
    A light emitting display comprising a plurality of electroluminescent devices according to any one of the preceding claims.
    [43" claim-type="Currently amended] 43. The light emitting display of claim 42, wherein the device is operable to generate light output having a plurality of colors.
    [44" claim-type="Currently amended] i) injecting acceptor impurities into a surface region of a silicon wafer doped with donor impurities to make the wafer n-type, wherein the surface region has a volume concentration of acceptor impurities greater than the volume concentration of donor impurities;
    ii) anodizing the wafer under illumination to create a light emitting porous silicon region extending through the surface region;
    iii) a method of manufacturing an electroluminescent device comprising the step of depositing an electrode on said porous silicon region,
    And wherein said surface area has a sheet resistivity greater than 100 kPa -1 prior to said anodizing step.
    [45" claim-type="Currently amended] 45. The method of claim 44, wherein the anodizing step is performed using aqueous hydrofluoric acid to produce microporous porous silicon.
    [46" claim-type="Currently amended] i) injecting acceptor impurities into a surface region of a silicon wafer doped with donor impurities to make the wafer n-type, wherein the surface region has a volume concentration of acceptor impurities greater than the volume concentration of donor impurities;
    ii) anodizing the wafer under illumination to create a light emitting porous silicon region extending through the surface region;
    iii) a method of manufacturing an electroluminescent device comprising the step of depositing an electrode on said porous silicon region,
    A method for manufacturing an electroluminescent device, characterized in that less than 1% acceptor impurities are electrically activated prior to the anodizing step.
    [47" claim-type="Currently amended] 47. The method of claim 46, wherein the anodizing step is performed using aqueous hydrofluoric acid to produce microporous porous silicon.
    [48" claim-type="Currently amended] In the electroluminescent device manufacturing method,
    i) injecting acceptor impurities into a surface region of a silicon wafer doped with donor impurities to make the wafer n-type such that the surface region has a volume concentration of acceptor impurities that is greater than the volume concentration of donor impurities and at least in the region; Some have an acceptor impurity volume concentration similar to the solid solubility of the acceptor impurity in silicon;
    ii) anodizing the wafer under illumination to create a light emitting porous silicon region extending through the surface region;
    iii) depositing an electrode on said porous silicon region.
    [49" claim-type="Currently amended] i) injecting acceptor impurities into a surface region of a silicon wafer doped with donor impurities to make the wafer n-type, wherein the surface region has a volume concentration of acceptor impurities greater than the volume concentration of donor impurities;
    ii) anodizing the wafer under illumination to create a light emitting porous silicon region extending through the surface region;
    iii) a method of manufacturing an electroluminescent device comprising the step of depositing an electrode on said porous silicon region,
    And said silicon wafer is not heat cooled between steps i) and ii).
    [50" claim-type="Currently amended] 50. The method of claim 49, wherein the anodizing step is performed using aqueous hydrofluoric acid to produce microporous porous silicon.
    [51" claim-type="Currently amended] i) injecting acceptor impurities into a surface region of a silicon wafer doped with donor impurities to make the wafer n-type, wherein the surface region has a volume concentration of acceptor impurities greater than the volume concentration of donor impurities;
    ii) anodizing the wafer under illumination to create a light emitting porous silicon region extending through the surface region;
    iii) a method of manufacturing an electroluminescent device comprising the step of depositing an electrode on said porous silicon region,
    And the anodizing step is to dop the surface of the silicon quantum wire in the porous silicon region so that the surface doped quantum wire is p-type.
    [52" claim-type="Currently amended] 52. The method of claim 51, wherein the anodizing step is performed using aqueous hydrofluoric acid to produce microporous porous silicon.
    [53" claim-type="Currently amended] In P-type porous silicon,
    P-type porous silicon, characterized in that the porous silicon has a hole of 30% or more.
    [54" claim-type="Currently amended] 54. The P-type porous silicon of claim 53, wherein the porous silicon comprises silicon quantum wire.
    [55" claim-type="Currently amended] 55. The P-type porous silicon as recited in claim 54, wherein said porous silicon has at least 60% pores.
    [56" claim-type="Currently amended] In porous silicon almost entirely pore and visible light emission,
    The porous silicon is luminescent porous silicon, characterized in that derived from n-type bulk silicon.
    [57" claim-type="Currently amended] An electroluminescent device comprising a porous silicon region and electrical contacts to the porous silicon region,
    And the porous silicon region has a p-n junction therein.
    [58" claim-type="Currently amended] An electroluminescent device comprising a porous silicon region and electrical contacts to the porous silicon region,
    The porous silicon region is an electroluminescent device, characterized in that the visible light emitting region as a whole micropore made of n-type bulk silicon.
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    同族专利:
    公开号 | 公开日
    GB2299204A|1996-09-25|
    WO1996029746A1|1996-09-26|
    US20070004064A1|2007-01-04|
    US20050087760A1|2005-04-28|
    EP1233460A3|2009-11-11|
    US6380550B1|2002-04-30|
    US20020096688A1|2002-07-25|
    EP0815597A1|1998-01-07|
    JPH11502372A|1999-02-23|
    CN1185234A|1998-06-17|
    EP1233460A2|2002-08-21|
    GB9505569D0|1995-05-03|
    JP3828933B2|2006-10-04|
    DE69623000T2|2003-04-30|
    EP0815597B1|2002-08-14|
    CA2215708A1|1996-09-26|
    DE69623000D1|2002-09-19|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1995-03-20|Priority to GB9505569A
    1995-03-20|Priority to GB9505569.5
    1996-03-15|Application filed by 에스 알 스켈턴, 더 세크레터리 오브 스테이트 포 디펜스
    1998-10-15|Publication of KR19980703224A
    优先权:
    申请号 | 申请日 | 专利标题
    GB9505569A|GB2299204A|1995-03-20|1995-03-20|Electroluminescent device|
    GB9505569.5|1995-03-20|
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